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Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout

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"As chip size and complexity continue to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks."

(Stuart Swan)

The last few years in the electronics industry have seen three areas of explosive growth in design verification. The first ‘explosion’ has been the tremendous increase in verification requirements for IC’s‚ ASICs‚ ASSPs‚ System-on-Chip (SoCs) and larger systems. This has been compounded by the rapid increase in use of embedded processors in these systems from the largest network infrastructure boxes all the way down to consumer appliances such as digital cameras and wireless handsets. With processors deeply embedded in systems‚ verification can no longer remain solely focused on hardware‚ but must broaden its scope to include hardware-dependent software co-verification‚ and large components of middleware and applications software verification in the overall system context.


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