| Digitally Assisted Pipeline ADCs: Theory and Implementation explores the opportunity to reduce ADC power dissipation by leveraging digital signal processing capabilities in fine line integrated circuit technology. The described digitally assisted pipelined ADC uses a statistics-based system identification technique as an enabling element to replace precision residue amplifiers with simple open-loop gain stages. The digital compensation of analog circuit distortion eliminates one key factor in the classical noise-speed-linearity constraint loop and thereby enables a significant power reduction.
Digitally Assisted Pipeline ADCs: Theory and Implementation describes in detail the implementation and measurement results of a 12-bit, 75-MSample/sec proof-of-concept prototype. The Experimental converter achieves power savings greater than 60% over conventional implementations.
Digitally Assisted Pipeline ADCs: Theory and Implementation will be of interest to researchers and professionals interested in advances of state-of-the-art in A/D conversion techniques.
This book proposes a different approach that takes advantage of the availability of high performance digital processing to relax analog circuit linearity requirements. The use of simple but nonlinear open loop amplification translates into increased analog circuit performance or lower power dissipation. In a careful design that uses a modern process, the area and power penalty of the added digital circuitry is negligible and benefits fully from further technology scaling.
Of the many reasons for this disparity between analog and digital circuit performance advances, accuracy requirements stand out as a critical constraint in most analog circuits while being virtually absent in digital designs. Thermal noise, linearity, and matching are distinctly analog circuit problems and require design tradeoffs that invariably lower achievable performance. For example, linearity requirements are usually met with highgain feedback loops. Unfortunately, this solution also lowers circuit speed and results in elevated noise, reduced signal range, and increased power dissipation.
Technology scaling, while unquestionably advantageous for digital circuits, further exacerbates analog circuit design challenges. While offering increased speed, scaled devices suffer from reduced intrinsic gain, further adding to the design challenge of high-gain feedback loops. Reduced supply voltages lower the ratio of useful signal range to supply, leading to increased power dissipation in noise-limited circuits. |
